The present invention relates to operational amplifiers, and more particularly to an operational amplifier with a differential transistor input stage.
In many areas of the electronics industry, such as the portable electronics industry, designers are increasingly using electronic systems requiring lower operating voltages. This enables electronic circuit designers to design systems with smaller power supplies, which in turn reduces product weight and size, and increases the life expectancy of the system DC power supply.
To accommodate the lower operating voltages, electronic circuit designers may typically design electronic circuits using a differential input stage (e.g. differential amplifier). The input stage of the differential amplifier may be coupled to an upper and lower supply rail, where the input stage may further include one or more differential transistor pairs with associated current sources. In addition, the input stage may typically include a common mode input voltage which defines the voltage range within which the input stage of the differential amplifier operates. The common mode input voltage may typically be measured between the upper, or lower, rail of the input stage and the gate node or base node of one transistor of the transistor pair.
FIG. 1 shows an example of a conventional common mode range differential amplifier 10, as described in U.S. Pat. No. 6,150,883 issued Nov. 21, 2000, to Ivanov. Ivanov discloses a differential amplifier including a differential input stage with differentially coupled first 13 and second 14 transistors, and differentially coupled third 17 and fourth 18 transistors.
As shown in FIG. 1, the input stage of amplifier 10 includes a current source 20 that outputs a tail current IT to the differential transistor pair given by transistors 17 and 18. The drains of transistors 13 and 14 are coupled to a first cascode circuit given by transistors 25 and 26. Similarly, the drains of transistors 17 and 18 are coupled to a second cascode circuit given by transistors 36 and 37. In this arrangement, amplifier 10 may vary the magnitude of the currents provided by transistors 17 and 18 in response to the voltage difference provided by differential voltage input VIN+ and VINxe2x88x92.
One problem inherent in the conventional differential amplifier designs, such as that disclosed in the Ivanov patent, however, results from the fabrication process of the input stage transistors. In particular, due to the manufacturing tolerances, the input transistors may not be identically manufactured. This, in turn, may lead to transistors with differing transistor operation (e.g. mismatched transistors), though such differing operation is unintended. The mismatched transistor operation may affect the overall amplifier accuracy by contributing to errors in the input stage common mode rejection. Alternatively, the mismatched transistor operation may lead to a lower common mode rejection and/or lower voltage gain of the input stage than is desired.
The detrimental affects caused by the mismatched transistor operation may deteriorate the common mode rejection of the amplifier due to instability of the source-to-drain voltage and the source-to-body voltages of the differently manufactured input transistors. In addition, the unstable source-to-drain and source-to-body voltages may lead to an input stage with low-voltage gain. The low-voltage gain of the input stage may affect the voltage offset of any amplifier stage following the input stage, and subsequently may affect the overall voltage offset of the entire amplifier system. For example, the common mode rejection of an operational amplifier using CMOS transistors, such as that didsclosed in the Ivanov patent, may be limited to about 75 to 85 decibels (dB). In this context, instability may mean that, where multiple transistors are used in the input stage, the source-to-drain and/or source-to-body voltages of the transistors may not be identical due to manufacturing tolerances. A stable signal may result where the stages subsequent to the input stage are provided a source-to-drain or source-to-body voltage signal which is identical or substantially identical.
It should also be noted that transistor mismatching is especially severe for transistors with a thick gate oxide, such as with high-voltage rated transistors. High-voltage rated transistors are typically used to achieve high drain-source voltages during amplifier operation. Further, since in a typical differential amplifier, the drain-source voltage of the amplifier input pair may be as high as the supply voltage, the use of high-voltage thick-oxide transistors is required. In some instances, the differential amplifier may use a combination of low-voltage thin-oxide transistors and high-voltage thick-oxide transistors. In this case, the differential amplifier input stage must be configured to withstand the common-mode input voltage over the full supply voltage range. As was previously noted, however, the use of high-voltage transistors in the input stage determines the amplifier accuracy due to the transistor mismatch.
The low-voltage gain and errors in common-mode rejection are especially a problem in the design and operation of precision operational amplifiers. A precision operational amplifier is typically an amplifier with very high open loop gain and common mode/power supply rejection ratios, and very low offset voltage and offset current. Precision operational amplifiers are ideal for accurately amplifying signals, while introducing minimal error. Consequently, precision operational amplifiers are especially useful in applications, such as, for example, military, aviation, medical and space applications, requiring increased accuracy over other conventional amplifier designs.
Because of the critical environment in which precision operational amplifiers are used, a need exists for a precision operational amplifier wherein the rejection ratios of the amplifier are increased above amplifiers found in the prior art. It would be desirable for such a precision operational amplifier to include circuitry configured to account for effects on the amplifier offset voltage, and/or the instability of the source-to-drain, or source-to-body voltages, of the mismatched transistors.
The method and circuit according to various aspects described herein addresses many of the shortcomings of the prior art. In accordance with one aspect of the present invention, a precision operational amplifier is provided which uses CMOS transistors configured to stabilize the drain-to-source voltage of the transistors comprising the operational amplifier input stage. In one exemplary embodiment, an exemplary operational amplifier input stage uses a differential input pair of CMOS transistors, cascoded CMOS transistors, a voltage reference source, and an averaging circuit for detecting the average of the drain-to-source voltages of the CMOS input transistors. An amplifier is used to control the gate potential of the cascode CMOS transistors to aid in ensuring that the drain-to-source voltage of the input transistors is stabilized during operation. In one exemplary embodiment, the amplifier ensures that the drain-to-source voltage Vds remains substantially equal to the input transistor voltage reference source.
In accordance with another exemplary embodiment, an exemplary operational amplifier input stage includes a differential amplifier with cascoded transistors M3 and M4 configured in single voltage supply operation. In this context, single supply operation may include ensuring that at a common mode voltage of about zero volts, the gate voltages of the input transistors M1 and M2 are kept close to ground.